Issued Patents 2004
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6835647 | Semiconductor device including a plurality of interconnection layers, manufacturing method thereof and method of designing semiconductor circuit used in the manufacturing method | Hiroyuki Amishiro | 2004-12-28 |
| 6818932 | Semiconductor device with improved soft error resistance | Koji Nii | 2004-11-16 |
| 6815839 | Soft error resistant semiconductor memory device | Koji Nii | 2004-11-09 |
| 6753246 | Semiconductor device with a first dummy pattern | Hiroshi Kawashima, Masakazu Okada, Takeshi Kitani | 2004-06-22 |
| 6730976 | Multilayer gate electrode structure with tilted on implantation | Akihiko Harada | 2004-05-04 |
| 6720626 | Semiconductor device having improved gate structure | — | 2004-04-13 |
| 6693820 | Soft error resistant semiconductor memory device | Koji Nii | 2004-02-17 |
| 6683351 | Semiconductor device having structures that can avoid deterioration caused by the manufacturing processing | Kiyoaki Morita | 2004-01-27 |