PT

Pradeep Trivedi

Oracle: 25 patents #2 of 1,015Top 1%
📍 Saratoga, CA: #1 of 387 inventorsTop 1%
🗺 California: #14 of 28,370 inventorsTop 1%
Overall (2004): #105 of 270,089Top 1%
25
Patents 2004

Issued Patents 2004

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDate
6829548 DLL static phase error measurement technique Priya Ananthanarayanan, Claude Gauthier 2004-12-07
6819192 Jitter estimation for a phase locked loop Claude Gauthier, Brian Amick, Dean Liu 2004-11-16
6812758 Negative bias temperature instability correction technique for delay locked loop and phase locked loop bias generators Claude Gauthier, Gin Yee 2004-11-02
6812755 Variation reduction technique for charge pump transistor aging Gin Yee, Claude Gauthier 2004-11-02
6809557 Increasing power supply noise rejection using linear voltage regulators in an on-chip temperature sensor Claude Gauthier, Spencer Gold, Dean Liu, Kamran Zarrineh, Brian Amick 2004-10-26
6806698 Quantifying a difference between nodal voltages Claude Gauthier, Brian Amick, Spencer Gold, Dean Liu, Kamran Zarrineh 2004-10-19
6788045 Method and apparatus for calibrating a delay locked loop charge pump current Claude Gauthier, Brian Amick, Dean Liu 2004-09-07
6784689 Transmission gate based signal transition accelerator Sudhakar Bobba 2004-08-31
6784752 Post-silicon phase offset control of phase locked loop input receiver Claude Gauthier, Brian Amick, Dean Liu 2004-08-31
6778027 Phase locked loop input receiver design with delay matching feature Claude Gauthier, Brian Amick 2004-08-17
6775638 Post-silicon control of an embedded temperature sensor Claude Gauthier, Brian Amick, Spencer Gold, Lynn Ooi 2004-08-10
6768955 Adjustment and calibration system for post-fabrication treatment of phase locked loop charge pump Claude Gauthier, Brian Amick, Dean Liu 2004-07-27
6762505 150 degree bump placement layout for an integrated circuit power grid Sudhakar Bobba, Tyler Thorp, Dean Liu 2004-07-13
6753740 Method and apparatus for calibration of a post-fabrication bias voltage tuning feature for self biasing phase locked loop Claude Gauthier, Brian Amick, Dean Liu 2004-06-22
6749335 Adjustment and calibration system for post-fabrication treatment of on-chip temperature sensor Claude Gauthier, Brian Amick, Spencer Gold, Lynn Ooi 2004-06-15
6748339 Method for simulating power supply noise in an on-chip temperature sensor Brian Amick, Claude Gauthier, Dean Liu 2004-06-08
6737844 Dynamic modulation of on-chip supply voltage for low-power design Sudhakar Bobba 2004-05-18
6727737 Delay locked loop design with diode for loop filter capacitance leakage current control Claude Gauthier, Dean Liu 2004-04-27
6720813 Dual edge-triggered flip-flop design with asynchronous programmable reset Gin Yee, Joseph Siegel 2004-04-13
6708314 Clock skew reduction using active shields Sudhakar Bobba 2004-03-16
6707320 Clock detect indicator Gin Yee 2004-03-16
6704680 Method for decoupling capacitor optimization for a temperature sensor design Brian Amick, Claude Gauthier, Dean Liu 2004-03-09
6691291 Method and system for estimating jitter in a delay locked loop Claude Gauthier, Brian Amick, Dean Liu 2004-02-10
6687881 Method for optimizing loop bandwidth in delay locked loops Claude Gauthier, Brian Amick, Dean Liu 2004-02-03
6686785 Deskewing global clock skew using localized DLLs Dean Liu, Tyler Thorp, Gin Yee, Claude Gauthier 2004-02-03