Issued Patents 2004
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6822294 | High holding voltage LVTSCR | Vladislav Vashchenko, Ann Concannon | 2004-11-23 |
| 6806529 | Memory cell with a capacitive structure as a control gate and method of forming the memory cell | Yuri Mirgorodski, Andy Strachan | 2004-10-19 |
| 6798641 | Low cost, high density diffusion diode-capacitor | Philipp Lindorfer, Vladislav Vashchenko, Andrew Strachan | 2004-09-28 |
| 6797555 | Direct implantation of fluorine into the channel region of a PMOS device | Prasad Chaparala, Philipp Lindorfer, Vladislav Vashchenko | 2004-09-28 |
| 6784029 | Bi-directional ESD protection structure for BiCMOS technology | Vladislav Vashchenko, Ann Concannon, Marcel ter Beek | 2004-08-31 |
| 6777784 | Bipolar transistor-based electrostatic discharge (ESD) protection structure with a heat sink | Vladislav Vashchenko | 2004-08-17 |
| 6740956 | Metal trace with reduced RF impedance resulting from the skin effect | Peter Johnson, Kyuwoon Hwang, Michael Mian, Robert Drury | 2004-05-25 |
| 6723632 | Interconnect exhibiting reduced parasitic capacitance variation | — | 2004-04-20 |
| 6720624 | LVTSCR-like structure with internal emitter injection control | Vladislav Vashchenko, Ann Concannon, Marcel ter Beek | 2004-04-13 |
| 6717219 | High holding voltage ESD protection structure for BiCMOS technology | Vladislav Vashchenko, Ann Concannon, Marcel ter Beek | 2004-04-06 |
| 6707117 | Method of providing semiconductor interconnects using silicide exclusion | Vladislav Vashchenko, Philipp Lindorfer, Andy Strachon, Peter Johnson | 2004-03-16 |
| 6703710 | Dual damascene metal trace with reduced RF impedance resulting from the skin effect | Peter Johnson, Kyuwoon Hwang, Michael Mian, Robert Drury | 2004-03-09 |
| 6690069 | Low voltage complement ESD protection structures | Vladislav Vashchenko, Ann Concannon, Marcel ter Beek | 2004-02-10 |