YW

Yasushi Wada

RT Renesas Technology: 2 patents #233 of 1,436Top 20%
Overall (2004): #34,172 of 270,089Top 15%
2
Patents 2004

Issued Patents 2004

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6834376 Logic optimization device for automatically designing integrated circuits 2004-12-21
6720811 Semiconductor device with delay correction function Minobu Yazawa, Shinichi Nakagawa 2004-04-13