Issued Patents 2004
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6830977 | METHODS OF FORMING AN ISOLATION TRENCH IN A SEMICONDUCTOR, METHODS OF FORMING AN ISOLATION TRENCH IN A SURFACE OF A SILICON WAFER, METHODS OF FORMING AN ISOLATION TRENCH-ISOLATED TRANSISTOR, TRENCH-ISOLATED TRANSISTOR, TRENCH ISOLATION STRUCTURES FORMED IN A SEMICONDUCTOR, MEMORY CELLS AND DRAMS | Hirokazu Ueda, Hiroyuki Watanabe | 2004-12-14 |