KM

Kazutaka Miyano

EM Elpida Memory: 1 patents #8 of 54Top 15%
NE Nec: 1 patents #251 of 1,039Top 25%
NE Nec Electronics: 1 patents #49 of 338Top 15%
Overall (2004): #56,039 of 270,089Top 25%
2
Patents 2004

Issued Patents 2004

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6831500 Noise-reduced voltage boosting circuit Tomohiko Sato 2004-12-14
6690214 DLL circuit and DLL control method 2004-02-10