Issued Patents 2004
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826098 | Semiconductor memory having multiple redundant columns with offset segmentation boundaries | — | 2004-11-30 |
| 6816994 | Low power buffer implementation | Aaron Schoenfeld, Timothy B. Cowles | 2004-11-09 |
| 6816408 | Memory device with multi-level storage cells | — | 2004-11-09 |
| 6809986 | System and method for negative word line driver circuit | Tae H. Kim, Huy T. Vo | 2004-10-26 |
| 6798711 | Memory with address management | Debra M. Bell | 2004-09-28 |
| 6778459 | Fuse read sequence for auto refresh power reduction | — | 2004-08-17 |
| 6771553 | Low power auto-refresh circuit and method for dynamic random access memories | Timothy B. Cowles, Brian M. Shirley | 2004-08-03 |
| 6751143 | Method and system for low power refresh of dynamic random access memories | Donald M. Morgan | 2004-06-15 |
| 6750695 | Voltage pump and a level translator circuit | Todd A. Merritt | 2004-06-15 |
| 6717459 | Capacitor charge sharing charge pump | — | 2004-04-06 |