Issued Patents 2004
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6831292 | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same | Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond | 2004-12-14 |
| 6830976 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | — | 2004-12-14 |
| 6805744 | Method of producing device quality (Al)InGaP alloys on lattice-mismatched substrates | Andrew Y. Kim | 2004-10-19 |
| 6750130 | Heterointegration of materials using deposition and bonding | — | 2004-06-15 |
| 6737670 | Semiconductor substrate structure | Zhi-Yuan Cheng, Dimitri Antoniadis, Judy L. Hoyt | 2004-05-18 |
| 6730551 | Formation of planar strained layers | Minjoo L. Lee, Christopher Leitz | 2004-05-04 |
| 6713326 | Process for producing semiconductor article using graded epitaxial growth | Zhi-Yuan Cheng, Dimitri Antoniadis, Judy L. Hoyt | 2004-03-30 |
| 6703144 | Heterointegration of materials using deposition and bonding | — | 2004-03-09 |
| 6689211 | Etch stop layer system | Kenneth Chai-en Wu, Jeffrey T. Borenstein, Gianna Taraschi | 2004-02-10 |
| 6677192 | Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits | — | 2004-01-13 |