Issued Patents 2004
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6784890 | Accelerated graphics port expedite cycle throttling control mechanism | Brian Bergeson, Vincent E. VonBokern | 2004-08-31 |
| 6782435 | Device for spatially and temporally reordering for data between a processor, memory and peripherals | Serafin E. Garcia, Steve John Clohset, Mikal C. Hunsaker | 2004-08-24 |
| 6748513 | Method and apparatus for a low latency source-synchronous address receiver for a host system bus in a memory controller | Srinivasan T. Rajappa, Romesh Trivedi, Rajagopal Subramanian, Serafin E. Garcia | 2004-06-08 |
| 6694390 | Managing bus transaction dependencies | Serafin E. Garcia | 2004-02-17 |