Issued Patents 2004
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6832306 | Method and apparatus for a unified RISC/DSP pipeline controller for both reduced instruction set computer (RISC) control instructions and digital signal processing (DSP) instructions | Kumar Ganapathy | 2004-12-14 |
| 6772319 | Dyadic instruction processing instruction set architecture with 20-bit and 40-bit DSP and control instructions | Kumar Ganapathy | 2004-08-03 |
| 6766446 | Method and apparatus for loop buffering digital signal processing instructions | Kumar Ganapathy, Kenneth Malich | 2004-07-20 |
| 6748516 | Method and apparatus for instruction set architecture to perform primary and shadow digital signal processing sub-instructions simultaneously | Kumar Ganapathy | 2004-06-08 |