GL

Guo-Qiang Lo

IT Integrated Device Technology: 3 patents #4 of 41Top 10%
📍 Singapore, CA: #6 of 55 inventorsTop 15%
Overall (2004): #28,832 of 270,089Top 15%
3
Patents 2004

Issued Patents 2004

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6806154 Method for forming a salicided MOSFET structure with tunable oxynitride spacer 2004-10-19
6791155 Stress-relieved shallow trench isolation (STI) structure and method for forming the same Brian Schorr, Gary Foley, Shih-Ked Lee 2004-09-14
6740549 Gate structures having sidewall spacers using selective deposition and method of forming the same Chih-Hsiang Chen, S. Kevin Lee 2004-05-25