Issued Patents 2004
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826654 | Cache invalidation bus for a highly scalable shared cache memory hierarchy | Ravi Kumar Arimilli | 2004-11-30 |
| 6826655 | Apparatus for imprecisely tracking cache line inclusivity of a higher level cache | Ravi Kumar Arimilli | 2004-11-30 |
| 6823471 | Method for providing high availability within a data processing system via a reconfigurable hashed storage subsystem | Ravi Kumar Arimilli, Leo James Clark, John S. Dodson, Jerry Don Lewis | 2004-11-23 |
| 6813694 | Local invalidation buses for a highly scalable shared cache memory hierarchy | Ravi Kumar Arimilli | 2004-11-02 |
| 6801984 | Imprecise snooping based invalidation mechanism | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 2004-10-05 |
| 6785774 | High performance symmetric multiprocessing systems via super-coherent data mechanisms | Ravi Kumar Arimilli, William J. Starke, Derek E. Williams | 2004-08-31 |
| 6779086 | Symmetric multiprocessor systems with an independent super-coherent cache directory | Ravi Kumar Arimilli, William J. Starke, Derek E. Williams | 2004-08-17 |
| 6763433 | High performance cache intervention mechanism for symmetric multiprocessor systems | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2004-07-13 |
| 6763434 | Data processing system and method for resolving a conflict between requests to modify a shared cache line | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2004-07-13 |
| 6763435 | Super-coherent multiprocessor system bus protocols | Ravi Kumar Arimilli, William J. Starke, Derek E. Williams | 2004-07-13 |
| 6748518 | Multi-level multiprocessor speculation mechanism | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2004-06-08 |
| 6748501 | Microprocessor reservation mechanism for a hashed address system | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2004-06-08 |
| 6728873 | System and method for providing multiprocessor speculation within a speculative branch path | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2004-04-27 |
| 6725340 | Mechanism for folding storage barrier operations in a multiprocessor system | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2004-04-20 |
| 6721853 | High performance data processing system via cache victimization protocols | Ravi Kumar Arimilli, James Stephen Fields, Jr., John Steven Dodson | 2004-04-13 |
| 6721856 | Enhanced cache management mechanism via an intelligent system bus monitor | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2004-04-13 |
| 6704844 | Dynamic hardware and software performance optimizations for super-coherent SMP systems | Ravi Kumar Arimilli, William J. Starke, Derek E. Williams | 2004-03-09 |
| 6704843 | Enhanced multiprocessor response bus protocol enabling intra-cache line reference exchange | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2004-03-09 |
| 6691220 | Multiprocessor speculation mechanism via a barrier speculation flag | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2004-02-10 |