Issued Patents 2004
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6829699 | Rename finish conflict detection and recovery | Jens Leenstra | 2004-12-07 |
| 6825695 | Unified local clock buffer structures | Sang Hoo Dhong, Joel A. Silberman, Osamu Takahashi, James D. Warnock | 2004-11-30 |
| 6822500 | Methods and apparatus for operating master-slave latches | James D. Warnock | 2004-11-23 |
| 6785781 | Read/write alignment scheme for port reduction of multi-port SRAM cells | Jens Leenstra, Juergen Pille, Rolf Sautter | 2004-08-31 |
| 6744282 | Latching dynamic logic structure, and integrated circuit including same | Sang Hoo Dhong, Joel A. Silberman, Osamu Takahashi, James D. Warnock | 2004-06-01 |
| 6725332 | Hierarchical priority filter with integrated serialization for determining the entry with the highest priority in a buffer memory | Jens Leenstra, Antje Mueller, Juergen Pille | 2004-04-20 |