SM

Satoshi Meguro

RT Renesas Technology: 1 patents #498 of 1,436Top 35%
📍 Kodaira, JP: #49 of 129 inventorsTop 40%
Overall (2004): #121,061 of 270,089Top 45%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6777282 Method of manufacturing a semiconductor memory device having a memory cell portion including MISFETs with a floating gate and a peripheral circuit portion with MISFETs Kazuhiro Komori, Toshiaki Nishimoto, Hitoshi Kume, Yoshiaki Kamigaki 2004-08-17