Issued Patents 2004
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6821865 | Deep isolation trenches | Michael Wise | 2004-11-23 |
| 6794242 | Extendible process for improved top oxide layer for DRAM array and the gate interconnects while providing self-aligned gate contacts | Thomas W. Dyer, Laertis Economikos, Scott D. Halle, Rajeev Malik, Norbert Arnod | 2004-09-21 |
| 6706634 | Control of separation between transfer gate and storage node in vertical DRAM | Mihel Seitz, Irene McStay | 2004-03-16 |