Issued Patents 2004
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6799310 | Integrated circuit layout method and program for mitigating effect due to voltage drop of power supply wiring | — | 2004-09-28 |
TM
Tetsuo Miyamoto
Overall (2004): #103,184 of 270,089Top 40%
1
Patents 2004