Issued Patents 2004
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6816979 | Configurable fast clock detection logic with programmable resolution | Jiann-Cheng Chen, S. Babar Raza | 2004-11-09 |
| 6816955 | Logic for providing arbitration for synchronous dual-port memory | S. Babar Raza | 2004-11-09 |
| 6810098 | FIFO read interface protocol | S. Babar Raza | 2004-10-26 |
| 6760872 | Configurable and memory architecture independent memory built-in self test | Jay Kishora Gupta | 2004-07-06 |
| 6721878 | Low-latency interrupt handling during memory access delay periods in microprocessors | Gregory H. Efland | 2004-04-13 |
| 6715021 | Out-of-band look-ahead arbitration method and/or architecture | S. Babar Raza | 2004-03-30 |
| 6704863 | Low-latency DMA handling in pipelined processors | Gregory H. Efland | 2004-03-09 |