Issued Patents 2004
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6835616 | Method of forming a floating metal structure in an integrated circuit | Mira Ben-Tzur, James Hunter, Thurman J. Rodgers, Mike Bruner, Klyoko Keuchi | 2004-12-28 |
| 6828201 | Method of manufacturing a top insulating layer for a sonos-type device | — | 2004-12-07 |
| 6818558 | Method of manufacturing a dielectric layer for a silicon-oxide-nitride-oxide-silicon (SONOS) type devices | Manuj Rathor, Fred Jenne, Loren T. Lancaster | 2004-11-16 |
| 6817903 | Process for reducing leakage in an integrated circuit with shallow trench isolated active areas | Kaichiu Wong, Venuka Jayatilaka | 2004-11-16 |
| 6803321 | Nitride spacer formation | Alain Blosse, Sundar Narayanan | 2004-10-12 |
| 6803330 | Method for growing ultra thin nitrided oxide | Sundar Narayanan | 2004-10-12 |
| 6794269 | Method for and structure formed from fabricating a relatively deep isolation structure | Prabhuram Gopalan, Biju Parameshwaran, Hanna Bamnolker, Sundar Narayanan | 2004-09-21 |
| 6777307 | Method of forming semiconductor structures with reduced step heights | Steven Hedayati | 2004-08-17 |
| 6774452 | Semiconductor structure having alignment marks with shallow trench isolation | Sharmin Sadoughi | 2004-08-10 |
| 6774033 | Metal stack for local interconnect layer | Mira Ben-Tzur, Dafna Beery, Gorley Lau | 2004-08-10 |
| 6773975 | Formation of a shallow trench isolation structure in integrated circuits | Sundar Narayanan, Shahin Sharifzadeh | 2004-08-10 |
| 6680516 | Controlled thickness gate stack | Alain Blosse | 2004-01-20 |
| 6677213 | SONOS structure including a deuterated oxide-silicon interface and method for making the same | Frederick B. Jenne | 2004-01-13 |