Issued Patents 2004
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6816932 | Bus precharge during a phase of a clock signal to eliminate idle clock cycle | James Y. Cho, Mark Pearce | 2004-11-09 |
| 6766389 | System on a chip for networking | Mark D. Hayter, James Y. Cho | 2004-07-20 |
| 6748479 | System having interfaces and switch that separates coherent and packet traffic | Barton Sano, James B. Keller, Laurent Moll, Koray Oner, Manu Gulati | 2004-06-08 |
| 6748492 | Deterministic setting of replacement policy in a cache through way selection | Michael Dickman | 2004-06-08 |
| 6748495 | Random generator | Chun Ning | 2004-06-08 |
| 6745297 | Cache coherent protocol in which exclusive and modified data is transferred to requesting agent from snooping agent | David A. Kruckemyer | 2004-06-01 |
| 6732234 | Direct access mode for a cache | Michael Dickman | 2004-05-04 |
| 6697918 | Cache configured to read evicted cache block responsive to transmitting block's address on interface | — | 2004-02-24 |
| 6684296 | Source controlled cache allocation | Mark D. Hayter | 2004-01-27 |
| 6678767 | Bus sampling on one edge of a clock signal and driving on another edge | James Y. Cho | 2004-01-13 |