Issued Patents 2004
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6741108 | Method and circuit to reduce jitter generation in a PLL using a reference quadrupler and an equalizer | Joseph Balardeta, Wei Fu | 2004-05-25 |
| 6720806 | Method and circuit for producing a reference frequency signal using a reference frequency doubler having frequency selection controls | Joseph Balardeta, Sudhaker Reddy Anumula | 2004-04-13 |