SL

Sheng Lin

TSMC: 1 patents #234 of 898Top 30%
📍 San Jose, CA: #938 of 2,805 inventorsTop 35%
🗺 California: #8,555 of 28,370 inventorsTop 35%
Overall (2004): #116,286 of 270,089Top 45%
1
Patents 2004

Issued Patents 2004

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6703282 Method of reducing NMOS device current degradation via formation of an HTO layer as an underlying component of a nitride-oxide sidewall spacer Fu Ji Yang, Chun Lin Tsai, Chien-Chih Chou, Ting-Jia Hu 2004-03-09