Issued Patents 2003
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6566190 | Vertical internally-connected trench cell (V-ICTC) and formation method for semiconductor memory devices | John Walsh | 2003-05-20 |
| 6562714 | Consolidation method of junction contact etch for below 150 nanometer deep trench-based DRAM devices | — | 2003-05-13 |
| 6544888 | Advanced contact integration scheme for deep-sub-150 nm devices | — | 2003-04-08 |
| 6528367 | Self-aligned active array along the length direction to form un-biased buried strap formation for sub-150 NM BEST DRAM devices | — | 2003-03-04 |
| 6521956 | Semiconductor device having contact of Si-Ge combined with cobalt silicide | — | 2003-02-18 |
| 6511905 | Semiconductor device with Si-Ge layer-containing low resistance, tunable contact | John Walsh | 2003-01-28 |