HW

Hiroshi Wabuka

NE Nec: 2 patents #90 of 1,409Top 7%
Overall (2003): #63,983 of 273,478Top 25%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6615394 Method and apparatus for preparing a simulation model for semiconductor integrated circuit at power terminal for simulating electromagnetic interference Masashi Ogawa 2003-09-02
6550037 Method for designing a decoupling circuit Noriaki Ando, Hitoshi Irino, Hirokazu Tohya 2003-04-15