Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6657919 | Delayed locked loop implementation in a synchronous dynamic random access memory | Richard C. Foss, Graham Allan | 2003-12-02 |
| 6657918 | Delayed locked loop implementation in a synchronous dynamic random access memory | Richard C. Foss, Graham Allan | 2003-12-02 |
| 6614705 | Dynamic random access memory boosted voltage supply | Richard C. Foss, Robert Harland, Valerie L. Lines | 2003-09-02 |
| 6584003 | Low power content addressable memory architecture | Jin-Ki Kim, Peter Vlasenko, Douglas Perry | 2003-06-24 |
| 6580654 | Boosted voltage supply | Richard C. Foss, Robert Harland, Valerie L. Lines | 2003-06-17 |
| 6546476 | Read/write timing for maximum utilization of bi-directional read/write bus | — | 2003-04-08 |
| 6529397 | Memory-logic semiconductor device | Shigetoshi Takeda, Taiji Ema | 2003-03-04 |
| 6522596 | Searchline control circuit and power reduction method | Abdullah Ahmed | 2003-02-18 |
| 6510503 | High bandwidth memory interface | Bruce Millar | 2003-01-21 |