Issued Patents 2003
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6654295 | Reduced topography DRAM cell fabricated using a modified logic process and method for operating same | Fu-Chieh Hsu | 2003-11-25 |
| 6642098 | DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same | Fu-Chieh Hsu | 2003-11-04 |
| 6573548 | DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same | Fu-Chieh Hsu | 2003-06-03 |
| 6512691 | Non-volatile memory embedded in a conventional logic process | Fu-Chieh Hsu | 2003-01-28 |
| 6510492 | Apparatus for controlling data transfer between a bus and memory array and method for operating same | Fu-Chieh Hsu | 2003-01-21 |
| 6509595 | DRAM cell fabricated using a modified logic process and method for operating same | Fu-Chieh Hsu | 2003-01-21 |
| 6504780 | Method and apparatus for completely hiding refresh operations in a dram device using clock division | — | 2003-01-07 |