PT

Prabhakar P. Tripathi

Lsi Logic: 2 patents #67 of 465Top 15%
📍 San Jose, CA: #437 of 2,756 inventorsTop 20%
🗺 California: #4,287 of 28,521 inventorsTop 20%
Overall (2003): #47,697 of 273,478Top 20%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6664141 Method of forming metal fuses in CMOS processes with copper interconnect Ruggero Castagnetti, Ramnath Venkatraman 2003-12-16
6569751 Low via resistance system Zhihai Wang, Weidan Li 2003-05-27