Issued Patents 2003
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6611951 | Method for estimating cell porosity of hardmacs | Yevgeny Berdichevsky | 2003-08-26 |
| 6609238 | Method of control cell placement to minimize connection length and cell delay | — | 2003-08-19 |
| 6594805 | Integrated design system and method for reducing and avoiding crosstalk | Maad Al-Dabagh, Tammy Huang | 2003-07-15 |
| 6594807 | Method for minimizing clock skew for an integrated circuit | Rajiv Kapur | 2003-07-15 |
| 6588003 | Method of control cell placement for datapath macros in integrated circuit designs | — | 2003-07-01 |
| 6543038 | Elmore model enhancement | — | 2003-04-01 |
| 6532572 | Method for estimating porosity of hardmacs | — | 2003-03-11 |
| 6507937 | Method of global placement of control cells and hardmac pins in a datapath macro for an integrated circuit design | — | 2003-01-14 |