Issued Patents 2003
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6654936 | Method and apparatus for determining the strengths and weaknesses of paths in an integrated circuit | — | 2003-11-25 |
| 6560571 | Method and apparatus for prioritizing the order in which checks are performed on a node in an integrated circuit | — | 2003-05-06 |
| 6550041 | Method and apparatus for evaluating the design quality of network nodes | — | 2003-04-15 |
| 6542860 | System and method for detecting nodes that are susceptible to floating | — | 2003-04-01 |
| 6523152 | Framework for rules checking utilizing resistor, nonresistor, node and small node data structures | Ted Rakel | 2003-02-18 |
| 6507807 | Method and apparatus for determining which branch of a network of an integrated circuit has the largest total effective RC delay | — | 2003-01-14 |