Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6643768 | Dyadic DSP instruction processor with main and sub-operation functional blocks selected from each set of multiplier and adder | Kumar Ganapathy | 2003-11-04 |
| 6631461 | Dyadic DSP instructions for digital signal processors | Kumar Ganapathy | 2003-10-07 |
| 6598155 | Method and apparatus for loop buffering digital signal processing instructions | Kumar Ganapathy, Kenneth Malich | 2003-07-22 |
| 6557096 | Processors with data typer and aligner selectively coupling data bits of data buses to adder and multiplier functional blocks to execute instructions with flexible data types | Kumar Ganapathy | 2003-04-29 |