Issued Patents 2003
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6671153 | Low-leakage diode string for use in the power-rail ESD clamp circuits | Wen-Yu Lo, Hun-Hsien Chang | 2003-12-30 |
| 6671147 | Double-triggered electrostatic discharge protection circuit | Kei-Kang Hung, Shao-Chang Huang | 2003-12-30 |
| 6665160 | Voltage control component for ESD protection and its relevant circuitry | Geeng-Lih Lin | 2003-12-16 |
| 6658597 | Method and apparatus for automatic recovery of microprocessors/microcontrollers during electromagnetic compatibility (EMC) testing | Yu-Yu Sung | 2003-12-02 |
| 6657835 | ESD protection circuit for mixed-voltage I/O by using stacked NMOS transistors with substrate triggering technique | Chien-Hui Chuang, Wen-Yu Lo | 2003-12-02 |
| 6653670 | Silicon-on-insulator diodes and ESD protection circuits | Kei-Kang Hung, Tien-Hao Tang | 2003-11-25 |
| 6649944 | Silicon-on-insulator diodes and ESD protection circuits | Kei-Kang Hung, Tien-Hao Tang | 2003-11-18 |
| 6639283 | Semiconductor device with substrate-triggered ESD protection | Kei-Kang Hung | 2003-10-28 |
| 6633087 | Low-capacitance bonding pad for semiconductor device | Hsin-Chin Jiang | 2003-10-14 |
| 6633068 | Low-noise silicon controlled rectifier for electrostatic discharge protection | Chyh-Yih Chang, Hsin-Chin Jiang | 2003-10-14 |
| 6621673 | Two-stage ESD protection circuit with a secondary ESD protection circuit having a quicker trigger-on rate | Geeng-Lih Lin | 2003-09-16 |
| 6617649 | Low substrate-noise electrostatic discharge protection circuits with bi-directional silicon diodes | Chyh-Yih Chang | 2003-09-09 |
| 6611026 | Substrate-biased silicon diode for electrostatic discharge protection and fabrication method | Chyh-Yih Chang | 2003-08-26 |
| 6599578 | Method for improving integrated circuits bonding firmness | Jeng-Jie Peng, Nien-Ming Wang | 2003-07-29 |
| 6590264 | Hybrid diodes with excellent ESD protection capacity | Che-Hao Chuang, Geeng-Lih Lin | 2003-07-08 |
| 6576974 | Bipolar junction transistors for on-chip electrostatic discharge protection and methods thereof | Chyh-Yih Chang, Hsin-Chin Jiang | 2003-06-10 |
| 6576958 | ESD protection networks with NMOS-bound or PMOS-bound diode structures in a shallow-trench-isolation (STI) CMOS process | Hun-Hsien Chang, Wen-Tai Wang | 2003-06-10 |
| 6573566 | Low-voltage-triggered SOI-SCR device and associated ESD protection circuit | Kei-Kang Hung, Shao-Chang Huang | 2003-06-03 |
| 6566715 | Substrate-triggered technique for on-chip ESD protection circuit | Tung-Yang Chen, Hun-Hsien Chang | 2003-05-20 |
| 6559508 | ESD protection device for open drain I/O pad in integrated circuits with merged layout structure | Geeng-Lih Lin | 2003-05-06 |
| 6521952 | Method of forming a silicon controlled rectifier devices in SOI CMOS process for on-chip ESD protection | Kei-Kang Hung, Tien-Hao Tang | 2003-02-18 |
| 6514839 | ESD implantation method in deep-submicron CMOS technology for high-voltage-tolerant applications with light-doping concentrations | Tung-Yang Chen, Hun-Hsien Chang | 2003-02-04 |