Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6670716 | Silicon-on-insulator (SOI) semiconductor structure for implementing transistor source connections using buried dual rail distribution | John E. Sheets, II, Gregory J. Uhlmann | 2003-12-30 |
| 6667518 | Method and semiconductor structure for implementing buried dual rail power distribution and integrated decoupling capacitance for silicon on insulator (SOI) devices | John E. Sheets, II | 2003-12-23 |
| 6657886 | Split local and continuous bitline for fast domino read SRAM | Chad A. Adams, Anthony Gus Aipperspach, Peter Thomas Freiburger | 2003-12-02 |
| 6645796 | Method and semiconductor structure for implementing reach through buried interconnect for silicon-on-insulator (SOI) devices | John E. Sheets, II | 2003-11-11 |
| 6643804 | Stability test for silicon on insulator SRAM memory cells utilizing bitline precharge stress operations to stress memory cells under test | Anthony Gus Aipperspach, Douglas M. Dewanz | 2003-11-04 |
| 6570433 | Laser fuseblow protection method for silicon on insulator (SOI) transistors | Anthony Gus Aipperspach | 2003-05-27 |
| 6538522 | Method and ring oscillator for evaluating dynamic circuits | Anthony Gus Aipperspach, Peter Thomas Freiburger, David M. Friend, Nghia V. Phan | 2003-03-25 |
| 6528853 | Method and semiconductor structure for implementing dual plane body contacts for silicon-on-insulator (SOI) transistors | John E. Sheets, II | 2003-03-04 |
| 6509236 | Laser fuseblow protection method for silicon on insulator (SOI) transistors | Anthony Gus Aipperspach | 2003-01-21 |