Issued Patents 2003
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6601229 | Client/server behavioral modeling and testcase development using VHDL for improved logic verification | Theron Paul Niederer, Raj K. Singh | 2003-07-29 |
| 6584518 | Cycle saving technique for managing linked lists | Brian Mitchell Bass, Jean Calvignac, Marco C. Heddes, Michael S. Siegel, Fabrice Jean Verplanken | 2003-06-24 |
| 6557053 | Queue manager for a buffer | Brian Mitchell Bass, Jean Calvignac, Marco C. Heddes, Michael S. Siegel, Fabrice Jean Verplanken | 2003-04-29 |