Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6658555 | Determining successful completion of an instruction by comparing the number of pending instruction cycles with a number based on the number of stages in the pipeline | James Allan Kahle, Charles Roberts Moore, David Shippy, Larry Edward Thatcher | 2003-12-02 |
| 6658534 | Mechanism to reduce instruction cache miss penalties and methods therefor | Steven Wayne White, Kurt A. Feiste, Paul J. Jordan | 2003-12-02 |
| 6654869 | Assigning a group tag to an instruction group wherein the group tag is recorded in the completion table along with a single instruction address for the group to facilitate in exception handling | James Allan Kahle, Charles Roberts Moore | 2003-11-25 |
| 6654876 | System for rejecting and reissuing instructions after a variable delay time period | David Shippy | 2003-11-25 |
| 6631463 | Method and apparatus for patching problematic instructions in a microprocessor using software interrupts | Michael Stephen Floyd, James Allan Kahle, John Anthony Moore, Kevin F. Reick, Edward John Silha | 2003-10-07 |
| 6553480 | System and method for managing the execution of instruction groups having multiple executable instructions | Hoichi Cheong | 2003-04-22 |
| 6543003 | Method and apparatus for multi-stage hang recovery in an out-of-order microprocessor | Michael Stephen Floyd, James Allan Kahle, Larry Scott Leitner, Kevin F. Reick | 2003-04-01 |
| 6543002 | Recovery from hang condition in a microprocessor | James Allan Kahle, Kevin F. Reick, David Shippy, Larry Edward Thatcher | 2003-04-01 |
| 6535973 | Method and system for speculatively issuing instructions | Hoichi Cheong, Maureen A. Delaney, Robert G. McDonald, Dung Q. Nguyen, David Wayne Victor | 2003-03-18 |