Issued Patents 2003
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6651223 | Logic circuit design method and cell library for use therewith | Shunzo Yamashita, Naoki Kato | 2003-11-18 |
| 6646300 | Semiconductor memory device | Tomoyuki Ishii | 2003-11-11 |
| 6625789 | Computer-readable medium for recording interface specifications | Koji Ara, Kei Suzuki | 2003-09-23 |
| 6623210 | Guidance method and guidance system of flood water | Yasuhiro Nomura | 2003-09-23 |
| 6609244 | Design method of a logic circuit | Naoki Kato, Hidetoshi Chikata, Shunzo Yamashita | 2003-08-19 |
| 6588348 | Movable money safe | Yasuhiro Nomura | 2003-07-08 |
| 6576943 | Semiconductor device for reducing leak currents and controlling a threshold voltage and using a thin channel structure | Tomoyuki Ishii, Toshiyuki Mine | 2003-06-10 |
| 6555882 | Semiconductor element and semiconductor memory device using the same | Tomoyuki Ishii, Takashi Hashimoto, Koichi Seki, Masakazu Aoki, Takeshi Sakata +2 more | 2003-04-29 |
| RE38059 | Semiconductor integrated logic circuit device using a pass transistor | Yasuhiko Sasaki | 2003-04-01 |
| 6515521 | Semiconductor integrated circuit for low power and high speed operation | Ichiro Kono, Naoki Kato | 2003-02-04 |
| 6514011 | Movable water-protection apparatus | Yasuhiro Nomura | 2003-02-04 |
| 6505322 | Logic circuit design method and cell library for use therewith | Shunzo Yamashita, Naoki Kato | 2003-01-07 |
| 6505338 | Computer readable medium with definition of interface recorded thereon, verification method for feasibility to connect given circuit and method of generating signal pattern | Kei Suzuki, Koji Ara | 2003-01-07 |