AN

Ajay Naini

Fujitsu Limited: 2 patents #433 of 3,284Top 15%
🗺 Texas: #1,114 of 8,709 inventorsTop 15%
Overall (2003): #77,146 of 273,478Top 30%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6603333 Method and apparatus for reduction of noise sensitivity in dynamic logic circuits James Vinh, Pranjal Srivastava, Robert S. Grondalski 2003-08-05
6542423 Read port design and method for register array Vydhyanathan Kalyanasundharam 2003-04-01