HK

Harish Kriplani

CS Cadence Design Systems: 1 patents #17 of 82Top 25%
🗺 California: #8,996 of 28,521 inventorsTop 35%
Overall (2003): #216,527 of 273,478Top 80%
1
Patents 2003

Issued Patents 2003

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6622290 Timing verification method employing dynamic abstraction in core/shell partitioning Arnold Ginetti, Mark Steven Hahn, Naser Awad 2003-09-16