BA

Bodgan Arsintescu

CS Cadence Design Systems: 1 patents #17 of 82Top 25%
📍 San Jose, CA: #929 of 2,756 inventorsTop 35%
🗺 California: #8,996 of 28,521 inventorsTop 35%
Overall (2003): #256,602 of 273,478Top 95%
1
Patents 2003

Issued Patents 2003

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6671866 Device level layout optimization in electronic design automation — 2003-12-30