Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6671846 | Method of automatically generating schematic and waveform diagrams for isolating faults from multiple failing paths in a circuit using input signal predictors and transition times | — | 2003-12-30 |
| 6653726 | Power redistribution bus for a wire bonded integrated circuit | Roger D. Weir | 2003-11-25 |
| 6653883 | Process, voltage and temperature independent clock tree deskew circuitry-temporary driver method | — | 2003-11-25 |
| 6625770 | Method of automatically generating schematic and waveform diagrams for relevant logic cells of a circuit using input signal predictors and transition times | — | 2003-09-23 |