DC

David Van Campenhout

VD Verisity Design: 1 patents #1 of 5Top 20%
📍 San Jose, CA: #851 of 2,494 inventorsTop 35%
🗺 California: #8,284 of 26,763 inventorsTop 35%
Overall (2002): #236,626 of 266,432Top 90%
1
Patents 2002

Issued Patents 2002

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6502232 Electronic circuit design environmentally constrained test generation system 2002-12-31