Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6480927 | High-performance modular memory system with crossbar connections | — | 2002-11-12 |
| 6477620 | Cache-level return data by-pass system for a hierarchical memory | Roger L. Gilbertson, Donald R. Kalvestrand, Joseph S. Schibinger, Daniel S. Tokoly | 2002-11-05 |
| 6457101 | System and method for providing the speculative return of cached data within a hierarchical memory system | Roger L. Gilbertson, Donald R. Kalvestrand, Joseph S. Schibinger, Daniel S. Tokoly | 2002-09-24 |
| 6453276 | Method and apparatus for efficiently generating test input for a logic simulator | — | 2002-09-17 |
| 6438659 | Directory based cache coherency system supporting multiple instruction processor and input/output caches | Eugene A. Rodi, Douglas E. Morrissey | 2002-08-20 |
| 6434641 | System for reducing the number of requests presented to a main memory in a memory storage system employing a directory-based caching scheme | Michael Haupt | 2002-08-13 |
| 6415364 | High-speed memory storage unit for a multiprocessor system having integrated directory and data storage subsystems | Eugene A. Rodi | 2002-07-02 |
| 6381715 | System and method for performing parallel initialization and testing of multiple memory banks and interfaces in a shared memory module | Roger L. Gilbertson, Eugene A. Rodi | 2002-04-30 |
| 6356991 | Programmable address translation system | Roger L. Gilbertson | 2002-03-12 |
| 6336088 | Method and apparatus for synchronizing independently executing test lists for design verification | Douglas H. Bloom, Joseba M. Desubijan, Larry L. Byers | 2002-01-01 |