Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6432785 | Method for fabricating ultra short channel PMOSFET with buried source/drain junctions and self-aligned silicide | — | 2002-08-13 |
| 6358818 | Method for forming trench isolation regions | — | 2002-03-19 |
| 6355540 | Stress-free shallow trench isolation | — | 2002-03-12 |
| 6348390 | Method for fabricating MOSFETS with a recessed self-aligned silicide contact and extended source/drain junctions | — | 2002-02-19 |
| 6342422 | Method for forming MOSFET with an elevated source/drain | — | 2002-01-29 |