Issued Patents 2002
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6483448 | System and method for reducing timing mismatch in sample and hold circuits using an FFT and decimation | Mark Spaeth | 2002-11-19 |
| 6420983 | On-line offset cancellation in flash A/D with interpolating comparator array | Gennady Feygin, Krishnasawamy Nagaraj | 2002-07-16 |
| 6407687 | System and method for reducing timing mismatch in sample and hold circuits using an FFT and subcircuit reassignment | Mark Spaeth | 2002-06-18 |