GC

George W. Conner

TE Teradyne: 2 patents #3 of 59Top 6%
📍 Camarillo, CA: #5 of 56 inventorsTop 9%
🗺 California: #3,859 of 26,763 inventorsTop 15%
Overall (2002): #65,049 of 266,432Top 25%
2
Patents 2002

Issued Patents 2002

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6486693 Method and apparatus for testing integrated circuit chips that output clocks for timing Peter Reichert 2002-11-26
6469493 Low cost CMOS tester with edge rate compensation Gerald F. Muething, Jr. 2002-10-22