SS

Shreekanth Sampigethaya

VL Virage Logic: 1 patents #5 of 10Top 50%
📍 San Jose, CA: #851 of 2,494 inventorsTop 35%
🗺 California: #8,284 of 26,763 inventorsTop 35%
Overall (2002): #117,215 of 266,432Top 45%
1
Patents 2002

Issued Patents 2002

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6396760 Memory having a redundancy scheme to allow one fuse to blow per faulty memory column Niranjan Behera 2002-05-28