Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6500739 | Formation of an indium retrograde profile via antimony ion implantation to improve NMOS short channel effect | Howard Chih-Hao Wang, Su-Yu Lu, Mu-Chi Chiang | 2002-12-31 |
| 6391752 | Method of fabricating a silicon-on-insulator semiconductor device with an implanted ground plane | Jean-Pierre Colinge | 2002-05-21 |
| 6380021 | Ultra-shallow junction formation by novel process sequence for PMOSFET | Jyh-Haur Wang, Chih-Chiang Wang, Hsien-Chin Lin, Kuo-Hua Pan | 2002-04-30 |
| 6368928 | Method of forming an indium retrograde profile via use of a low temperature anneal procedure to reduce NMOS short channel effects | Howard Chih-Hao Wang, Su-Yu Lu, Mu-Chi Chiang, Yu-Sen Chu, Chao-Jie Tsai | 2002-04-09 |
| 6359311 | Quasi-surrounding gate and a method of fabricating a silicon-on-insulator semiconductor device with the same | Jean-Pierre Colinge | 2002-03-19 |