JY

Jeongsik Yang

IL Integrated Memory Logic: 1 patents #1 of 7Top 15%
📍 San Jose, CA: #851 of 2,494 inventorsTop 35%
🗺 California: #8,284 of 26,763 inventorsTop 35%
Overall (2002): #191,904 of 266,432Top 75%
1
Patents 2002

Issued Patents 2002

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6477592 System for I/O interfacing for semiconductor chip utilizing addition of reference element to each data element in first data stream and interpret to recover data elements of second data stream Jawji Chen, Shuen-Chin Chang, Yong-Eun Park, Cindy NG, Chiayao S. Tung 2002-11-05