Issued Patents 2002
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6496917 | Method to reduce memory latencies by performing two levels of speculation | Rajasekhar Cherabuddi, Brian J. McGee, Meera Kasinathan, Anup K. Sharma, Sutikshan Bhutani | 2002-12-17 |
| 6477622 | Simplified writeback handling | Meera Kasinathan, Rajasekhar Cherabuddi | 2002-11-05 |
| 6446168 | Method and apparatus for dynamically switching a cache between direct-mapped and 4-way set associativity | Bruce E. Petrick | 2002-09-03 |