Issued Patents 2002
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6427225 | Method and apparatus for verification of a circuit layout | Osamu Kitada, Hironobu Taoka | 2002-07-30 |
TY
Terutoshi Yamasaki
Overall (2002): #105,170 of 266,432Top 40%
1
Patents 2002