Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6499044 | Leading zero/one anticipator for floating point | Jeffrey S. Brooks, David E. Kreml | 2002-12-24 |
| 6460134 | Method and apparatus for a late pipeline enhanced floating point unit | Terence M. Potter, Jeffrey S. Brooks | 2002-10-01 |
| 6445213 | Method for calculating dynamic logic block propagation delay targets using time borrowing | Gopal Vijayan, Donald W. Glowka, Stephen C. Horne | 2002-09-03 |
| 6415405 | Method and apparatus for scan of synchronized dynamic logic using embedded scan gates | Stephen C. Horne, Michael R. Seningen | 2002-07-02 |
| 6404233 | Method and apparatus for logic circuit transition detection | Terence M. Potter | 2002-06-11 |
| 6370632 | Method and apparatus that enforces a regional memory model in hierarchical memory systems | Betty Y. Kikuta, Terence M. Potter | 2002-04-09 |
| 6367065 | Method and apparatus for N-Nary logic circuit design tool with precharge circuit evaluation | Timothy S. Leight, Terence M. Potter | 2002-04-02 |
| 6349387 | Dynamic adjustment of the clock rate in logic circuits | Terence M. Potter | 2002-02-19 |
| 6347327 | Method and apparatus for N-nary incrementor | Anthony M. Petro | 2002-02-12 |
| 6345381 | Method and apparatus for a logic circuit design tool | Timothy S. Leight, Terence M. Potter | 2002-02-05 |