Issued Patents 2002
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6470418 | Pipelining a content addressable memory cell array for low-power operation | Chau-Chin Wu, John R. Mick | 2002-10-22 |
| 6441651 | High voltage tolerable input buffer | — | 2002-08-27 |
| 6421265 | DRAM-based CAM cell using 3T or 4T DRAM cells | Chau-Chin Wu, Ta-Ke Tien | 2002-07-16 |
| 6400593 | Ternary CAM cell with DRAM mask circuit | Chau-Chin Wu | 2002-06-04 |
| 6373739 | Quad CAM cell with minimum cell size | Chau-Chin Wu | 2002-04-16 |
| 6372641 | Method of forming self-aligned via structure | — | 2002-04-16 |
| 6350645 | Strapping via for interconnecting integrated circuit structures | Kyle Terrill | 2002-02-26 |